Camera signal processing apparatus and camera signal processing method

ABSTRACT

A camera signal processing apparatus comprises an interpolated pixel data generating means for interpolating, at least on two directions, pixel data based on an imaging signal from a solid-state image sensor in which an imaging light enters through a color filter having a different spectral characteristic for each pixel separately generating interpolated pixel data in the at least two directions; a correlation detecting means for detecting a correlation value indicative of a degree of correlation in each of the at least two directions of the interpolated pixel data; a normalizing means for normalizing the correlation value of each of the at least two directions to generate a normalized value indicative of a relative value of the correlation value of each of the at least two directions; a correcting means for adding a predetermined correction value to the normalized value; a weighting means for weighting the interpolated pixel data in each of the at least two directions by the normalized value and adding together the weighted interpolated pixel data in all of the at least two directions; and an image generating means for generating an image based on the interpolated pixel data weighted by the weighting means.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a camera signal processingapparatus and a camera signal processing method for processing a camerasignal generated by a camera apparatus of single-plate type. Moreparticularly, the present invention relates to a camera signalprocessing apparatus and a camera signal processing method for computinga correlation value indicative of a correlation between interpolatedvalues of pixels when a luminance signal or a color difference signal isgenerated from an imaging signal generated by a solid-state imagesensor.

[0002] In a camera apparatus of single-plate type using a solid-stateimage sensor such as a charge coupled device (CCD) image sensor(hereafter simply referred to as a CCD), a color filter for transmittinglights corresponding to R (Red), G (Green), and B (Blue) is arranged onthe CCD. In this color filter, a region for transmitting a red light, aregion for transmitting a green light, and a region for transmitting ablue light are formed in matrix. For example, these regions are arrangedas G, R, G . . . or B, G, B . . . horizontally. The light that passedeach region of the color filter is inputted in the CCD. Then, pixel dataG, pixel data R, and pixel data B are generated from the pixelscorresponding to the R, G, and B regions of the color filter.

[0003] In this camera apparatus, a luminance signal and a color signalare generated based on the lights inputted in the CCD.

[0004] The CCD used in the above-mentioned camera apparatus is arrangedwith a color filter having R, G, and B for each pixel. The R, G, and Bregions are arranged as R, G, R, G, . . . horizontally for example. Inthis camera apparatus, a color signal is generated in correspondencewith the color filter arranged for each pixel. Therefore, in this CCD,in a pixel for which the color filter for transmitting a red light isarranged, the pixel data G and the pixel data B corresponding to G and Brespectively are not generated, making it necessary for the datacorresponding to G and B to be generated by interpolation.

[0005] In the above-mentioned camera apparatus, a method of processing aluminance camera signal generated by the CCD for example is known inwhich, for reading all pixels, pixel data is generated by performingarithmetic mean on the pixel data corresponding to four pixels, namelytwo vertical pixels and two horizontal pixels of the CCD.

[0006] In the single-plate camera apparatus, when generating pixel databy interpolation, correlation values indicative of correlations invertical and horizontal directions are detected. In this detection, thesignals of pixels arranged around are calculated by use of a filter toobtain the correlation value in vertical direction and the correlationvalue in horizontal direction. Further, in this camera apparatus, thepixel data obtained by interpolation is weighted by use of the obtainedcorrelation values.

SUMMARY OF THE INVENTION

[0007] However, in the above-mentioned camera apparatus, the detectionof a correlation value by the above-mentioned technique may fail tocorrectly detect the relationship between vertical correlation andhorizontal correlation in the pixel data generated by the CCD.

[0008] Namely, the relationship between vertical correlation andhorizontal correlation may not be correctly computed due to the aspectratio of the CCD or a distortion or noise caused when an analog signaloutputted from the CCD is detected or a high-frequency signal difficultto be detected for example.

[0009] If the relationship between vertical correlation and horizontalcorrelation is not correctly computed, it is difficult to determine inwhich of the vertical and horizontal directions the correlation ishigher.

[0010] It is therefore an object of the present invention to provide acamera signal processing apparatus and a camera signal processing methodcapable of varying the relationship between vertical correlation and.horizontal-correlation by considering a signal distortion caused by theCCD for example.

[0011] In carrying out the invention and according to one aspectthereof, there is provided a camera signal processing apparatuscomprising: a correlation detector for detecting a horizontalcorrelation value and a vertical correlation value for indicatingdegrees of correlation in horizontal and vertical directions ofinterpolated pixel data generated based on a position of pixel datadetected by a solid-state image sensor and pixel data around thatposition and detecting a horizontal correlation value and a verticalcorrelation value for weighting the interpolated pixel data; anormalizing circuit for normalizing the horizontal correlation value andthe vertical correlation value detected by the correlation detector togenerate a normalized value indicative of a relative value between thesecorrelation values; and a correcting circuit for adding a predeterminedcorrection value to the normalized value generated by the normalizingcircuit.

[0012] In carrying out the invention and according to another aspectthereof, there is provided a camera signal processing method comprisingthe steps of: detecting a horizontal correlation value and a verticalcorrelation value for indicating degrees of correlation in horizontaland vertical directions of interpolated pixel data generated based on aposition of pixel data detected by a solid-state image sensor and pixeldata around that position and detecting a horizontal correlation valueand a vertical correlation value for weighting the interpolated pixeldata; normalizing the horizontal correlation value and the verticalcorrelation value detected in the correlation detecting step to generatea normalized value indicative of a relative value between thesecorrelation values; and adding a predetermined correction value to thenormalized value generated in the normalizing step.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] These and other objects of the invention will be seen byreference to the description, taken in connection with the accompanyingdrawing, in which:

[0014]FIG. 1 is a block diagram illustrating an example of aconstitution of a camera apparatus;

[0015]FIG. 2 is a block diagram illustrating an example of aconstitution of a signal processing circuit;

[0016]FIG. 3 is a diagram illustrating an example of an arrangement ofpixel data R, G, and B each corresponding to each of pixels;

[0017]FIG. 4 is a circuit diagram illustrating an example of aconstitution of a vertical-direction interpolator;

[0018]FIG. 5 is a diagram illustrating an example of an arrangement ofpixel data G corresponding to each pixel;

[0019]FIG. 6 is a graph illustrating a frequency characteristic of anLPF [1, 0, 6, 0, 1];

[0020]FIG. 7 is a graph-illustrating a frequency characteristic of anLPF [1, 0, 1];

[0021]FIG. 8 is a diagram illustrating an example of interpolated pixeldata G′ to be generated after interpolation;

[0022]FIG. 9 is a circuit digram illustrating an example of ahorizontal-direction interpolator;

[0023]FIG. 10 is a diagram illustrating an example of an arrangement ofpixel data B corresponding to each pixel;

[0024]FIG. 11 is a diagram illustrating an example of an arrangementinterpolated pixel data B′ obtained when vertically performingarithmetic mean on the pixel data B corresponding to each pixel;

[0025]FIG. 12 is a diagram illustrating an example of interpolated pixeldata B′ to be generated after interpolation;

[0026]FIG. 13 is a circuit diagram illustrating an example of aconstitution of a vertical-direction interpolator;

[0027]FIG. 14 is a circuit diagram illustrating an example of aconstitution of an edge processor;

[0028]FIG. 15 is a diagram illustrating an example of edge processing tobe performed by the edge processor;

[0029]FIG. 16 is a circuit diagram illustrating an example of aconstitution of a horizontal correlation detector;

[0030]FIG. 17 is a circuit diagram illustrating an example of aconstitution of a vertical correlation detector;

[0031]FIG. 18 is a circuit diagram illustrating an example of aconstitution of a noise canceler;

[0032]FIG. 19A is a diagram illustrating an example of performingsubtraction processing on a correlation value inputted in the noisecanceler;

[0033]FIG. 19B is a diagram illustrating an example in which thecorrelation value is limited by a negative value;

[0034]FIG. 20 is a diagram illustrating an example of a constitution ofan offset circuit;

[0035]FIG. 21 is a graph illustrating an example of the variation ininput/output characteristic obtained when an offset value is added to acorrelation value inputted in the offset circuit;

[0036]FIG. 22 is a diagram illustrating an example of image data thatchanges in color for each adjacent pixel data;

[0037]FIG. 23 is a diagram illustrating an example of a constitution ofa bias correcting circuit;

[0038]FIG. 24 is a diagram illustrating an example of the variation ininput/output characteristic obtained when a correction value is added toa correlation value inputted in the bias correcting circuit;

[0039]FIG. 25 is a diagram illustrating an example of a constitution ofan emphasis/deemphasis circuit;

[0040]FIG. 26 is a graph illustrating the variation in input/outputcharacteristic obtained when multiplication is performed on acorrelation value inputted in the emphasis/deemphasis circuit;

[0041]FIG. 27 is a circuit diagram illustrating an example of aconstitution of a color difference signal suppressor;

[0042]FIG. 28A and FIG. 28B are diagrams illustrating examples ofselecting minimum absolute value interpolated pixel data Rh and Gh ofthe color differences of interpolated pixel data Rv and Gv for pixeldata R and G vertically arranged in a color difference signalsuppressor, interpolated pixel data Rh and Gh for horizontally arrangedpixel data R and C, and weighted interpolated pixel data Rc and Gc; and

[0043]FIGS. 29A and 29B are diagrams illustrating other examples ofpixel data arrangements.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0044] This invention will be described in further detail by way ofexample with reference to the accompanying drawings.

[0045] As shown in FIG. 1, a camera signal processing apparatusassociated with the present invention is applicable to a cameraapparatus 1 for generating a still image according to an inputted lightfor example.

[0046] The camera apparatus 1 comprises an optical system 2 for formingthe image of a subject onto a CCD (Charge Coupled Device) imager(hereafter simply referred to as a CCD), a CCD 3, a timing generator 4for driving the CCD 3, a sample-and-hold circuit 5 for into which animaging signal is inputted, an AGC (Automatic Gain Control) circuit 6into which the imaging signal is inputted from the sample-and-holdcircuit 5 for gain control, an A/D converter 7 for converting theinputted imaging signal into digital image data, a camera signalprocessor 8 for performing camera signal processing on the image data, aCCD detector 9 for detecting the imaging signal generated by the CCD 3,and a control block 10 for controlling the above-mentioned components.

[0047] The CCD 3 has a color filter in which a region for transmitting ared light (R), a region for transmitting a green light (G), and a regionfor transmitting a blue light (B) are formed in a matrix. The lightstransmitted through the color filter for each pixel are inputted in theCCD 3. In this color filter, these color transmitting regions arearranged as R, G, R, G, . . . or G, B, G, B, . . . in a horizontaldirection for example. Namely, the CCD 3 generates pixel data R, pixeldata G, and pixel data B based on the lights corresponding to R, G, andB for each pixel.

[0048] The image data outputted from the A/D converter 7 is inputted inthe CCD detector 9. The image data detected by the CCD detector 9 isinputted in an AE (Automatic Exposure) circuit and an AF (AutomaticFocus) circuit, not shown, for example. The image data inputted in theAE circuit for example is used for adjusting the speed or aperture of anelectronic shutter, thereby automatically switching between thebrightness levels of light entering the CCD 3.

[0049] Referring to FIG. 2, the camera signal processor 8 comprises adefect correcting circuit 11 into which the image data is inputted fromthe A/D converter 7, a CLP (Clamp) circuit 12 into which the image datais inputted from the defect correcting circuit 11, a white balancecircuit 13 into which the image data is inputted from the CLP circuit12, and a γ (gamma) correcting circuit 14 into which the image data isinputted from the white balance circuit 13.

[0050] The defect correcting circuit 11 performs defect correction onthe image data supplied from the A/D converter 7. The defect correctingcircuit 11 corrects a defect of a pixel for which no pixel data isgenerated because the CCD 3 has a defect and outputs the corrected imagedata to the CLP 12.

[0051] In the CLP circuit 12, optical black is subtracted from the imagedata supplied from the defect correcting circuit 11. Thus, the CLPcircuit 12 corrects the black level of the inputted image data andoutputs the resultant image data to the white balance circuit 13.

[0052] The white balance circuit 13 adjusts the levels of the colorscorresponding to the image data R, G, and B supplied from the CLPcircuit 12. Thus, the white balance circuit 13 outputs the image datacorrected in level for each color to the gamma correcting circuit 14.

[0053] The gamma correcting circuits 14 performs gamma correction on theimage data supplied from the white balance circuit 13. Then, the gammacorrecting circuit 14 outputs the corrected image data to an image datainterpolating block and a correlation value detecting block to bedescribed later.

[0054] Referring to FIG. 2 again, the camera signal processor 8comprises the image data interpolating block 15 into which the imagedata is inputted from the gamma correcting circuit 14, a correlationvalue detecting block 16 for detecting a correlation value between thepieces of image data, a noise canceling block 17 for eliminating a noisefrom the correlation value, an offset circuit 18 for offsetting thecorrelation value, a normalizing circuit 19 for normalizing thecorrelation value, a bias correcting circuit 20 for correcting the biasin the direction of correlation detection, an emphasis/deemphasiscircuit 21 for emphasizing or deemphasizing the correlation, a weightedaddition circuit 22 for weighting the interpolated image data by use ofthe correlation value, a contour correcting circuit 23 for correctingthe contour of the image data, a Y/C converter 24 for converting theimage data into a Y/C signal composed of a luminance signal (Y) and acolor difference signal (C), a color difference signal suppresser 25 forsuppressing a false color signal caused by a color difference signal,and an output block 26.

[0055] Image data composed of plural pieces of pixel data is inputtedfrom the gamma correcting circuit 14 into the image data interpolatingblock 15. The image data interpolating block 15 perform interpolation onthe pixel data R, G, and B for each pixel to generate interpolated pixeldata R′, G′, and B′. The image data interpolating block 15 includes ahorizontal-direction interpolator 15 a for interpolating the pixel datacorresponding to horizontally arranged pixels and a vertical-directioninterpolator 15 b for interpolating the pixel data corresponding tovertically arranged pixels.

[0056] The pixel data R, G, and B corresponding to the pixels arrangedin a matrix as shown in FIG. 3 is inputted in the horizontal-directioninterpolator 15 a. The horizontal-direction interpolator 15 a computesthe interpolated pixel data in horizontal direction by use of a filterexpressed in a relation (1) below. It should be noted that FIG. 3 showsthe pixel data R, G, and B each corresponding to each pixel andindicates each pixel in a coordinate number. In what follows, it isassumed that the pixels be arranged on horizontal lines 0h, 1h, 2h, 3h,and 4h.

[1, 4, 6, 4, 1]/8  (1)

[0057] Because the filter indicated by the relation (1) is used tocompute interpolated pixel data R′, G′, and B′, the horizontal-directioninterpolator 15 a is constituted as shown in FIG. 4.

[0058] When generating the interpolated pixel data R′, G′, and B′ inhorizontal direction, the horizontal-direction interpolator 15 a isconstituted as shown in FIG. 4. The horizontal-direction interpolator 15a comprises an input block 30 into which pixel data is inputted from thegamma correcting circuit 14, a delay circuit 31 into which each piece ofpixel data is inputted from the input block 30, a filter 32 into whicheach piece of pixel data in horizontal direction is inputted from thedelay circuit 31 to generate interpolated pixel data, a selector 33 intowhich the interpolated pixel data is inputted through-the filter 32, andan output terminal 34 from which the interpolated pixel data suppliedfrom the selector 33 is outputted.

[0059] Pixel data pieces in horizontal direction are sequentiallyinputted in the input block 30 from the gamma correcting circuit 14.These pixel data pieces are inputted in the input block 30 one at eachclock.

[0060] The delay circuit 31 includes delay circuits 31 a through 31 dinto which the pixel data inputted in the input block 30 are inputted.In the delay circuit 31, the inputted pixel data are inputted in thedelay circuits 31 a through 31 d in synchronization with theabove-mentioned clock, the delayed pixel data being outputted to thefilter 32.

[0061] The filter 32 includes an adder 32 a into which the pixel data isinputted through the input block 30 and the delay circuit 31 d, an adder32 b into which the pixel data is inputted through the delay circuit 31a and the delay circuit 31 c, an adder 32 c into which the pixel data isinputted through the delay circuit 31 b, and an adder 32 d into whichthe outputs from the adder 32 a and the adder 32 c are inputted.

[0062] In the adder 32 a, the pixel data directly from the input block30 and the pixel data through the delay circuit 31 b are inputted. Inthe adder 32 c, the pixel data is inputted through the delay circuit 31b. In the adder 32 d, the pixel data is inputted through the adder 32 aand the adder 32 c. In the adder 32 b, the pixel data is inputtedthrough the delay circuit 31 a and the delay circuit 31 a.

[0063] Namely, the filter 32 constitutes filter [1, 0, 6, 0, 1]/8 by theadders 32 a, 32 c, and 32 d and filter [1, 0, 1]/2 by the adder 32 b.

[0064] The selector 33 includes a selector 33 a and a selector 33 b intowhich the output of the adder 32 d and the pixel data through the delaycircuit 31 b are inputted, a selector 33 c into which the output of theselector 33 a and the output of the adder 32 b are inputted, and aselector 33 d into which the outputs of the adder 32 b and the selector33 b are inputted.

[0065] A control signal is inputted from the control block 10 into theseselectors 33 a through 33 d to control the operations of thereof.

[0066] The output block 34 has a terminal 34 a for outputting the datafrom the selector 33 c and a terminal 34 b for outputting the data fromthe selector 33 d to an edge processor circuit to be described later.

[0067] The horizontal-direction interpolator 15 a thus constitutedcomputes not only interpolated pixel data R22′ and B22′ but alsointerpolated pixel data G22′ for pixel data G22 for example.

[0068] When the horizontal-direction interpolator 15 a computesinterpolated pixel data G22′ for pixel data G22 shown in FIG. 3, pixeldata G20, R21, G22, R23, and G24 in 2h are sequentially inputted in theinput block 30.

[0069] Next, the pixel data G20, R21, G22, R23, and G24 inputted in theinput block 30 are inputted into the filter 32 through the delay circuit31. Namely, the pixel data G20 is inputted into the adder 32 a, thepixel data R21 is inputted into the adder 32 b, the pixel data G22 isinputted into the adder 32 c, the pixel data R23 is inputted into theadder 32 b, and the pixel data G24 is inputted into the adder 32 a.

[0070] Then, the filter 32 computes-interpolated pixel data G22′ for thepixel data G22 from the pixel data G20, G22, and G24. Namely, the adder32 a adds the pixel data G20 and the pixel data G24 and outputs a resultto the adder 32 d. The adder 32 c adds a result of quadrupling the pixeldata G22 and a result of doubling the pixel data G22 and outputs aresult of this addition to the adder 32 d. Then, the adder 32 d adds theoutputs of the adder 32 a and the adder 32 c and performs ⅛multiplication on a result of this addition to output a result of themultiplication to the selector 33. The adder 32 b adds the pixel dataR21 and the pixel data R23 and performs ½ multiplication on a result ofthis addition to output a result of this multiplication to the selector33.

[0071] Thus, by performing the adding operations by the adders 32 a, 32c, 32 d, {pixel data G20+6×pixel data G22+pixel data G24 }/8 iscomputed. Namely, the filter 32 constitutes filter [1, 0, 1]/2 by theadder 32 b, constitutes filter [1, 0, 6, 0, 1]/8 by the adders 32 a, 32c, and 32 d, and passes the pixel data G20, G22, and G24 through thefilter indicated in the relation (1) above. Therefore, according to thefilter 32, interpolated pixel data R22′ and G22′ for the pixel data R22and G22 are generated.

[0072] Then, the interpolated pixel data G22′ and the pixel data G22 areinputted in the selector 33 a and the selector 33 b. A control signal Hor a control signal L from the control block 10 is also inputted in theselector 33 a and the selector 33 b. When the control signal H isinputted, the selector 33 a and the selector 33 b output theinterpolated pixel data G22′ supplied from the filter 32 to the selector33 c and the selector 33 d. When the control signal L is inputted, theselector 33 a and the selector 33 b output the pixel data G22 to theselector 33 c and the selector 33 d without change.

[0073] Next, because the interpolated pixel data G22′ for the pixel dataG22 is generated by the filter 32, the control block 10 outputs thecontrol signal L to the selector 33 c and the selector 33 d. When thecontrol signal L is thus inputted into the selector 33 c and theselector 33 d, the selector 33 c outputs the interpolated pixel dataR22′ and the selector 33 d outputs the pixel data G22 or theinterpolated pixel data G22′.

[0074] On the other hand, when the control signal H is inputted from thecontrol block 10 into the selector 33 c and the selector 33 d, theselector 33 c outputs the data supplied from the selector 33 a and theselector 33 d outputs the data supplied from the adder 32 b.

[0075] The selector 33 c outputs interpolated pixel data R′ orinterpolated pixel data B′ to the terminal 34 a. The selector 33 doutputs interpolated pixel data G′ to the terminal 34 b. When outputtingthe interpolated pixel data G22′ for the pixel data G22 for example, theselector 33 d is controlled to output the input from the selector 33 b.When outputting the interpolated pixel data G23′ for the pixel data R23for example, the selector 33 d is controlled to output the input fromthe adder 32 b. When outputting the interpolated pixel data R22′ for thepixel data G22 for example, the selector 33 c is controlled to outputthe input from the adder 32 b. When outputting the interpolated pixeldata R23′ for the pixel data R23, the selector 33 c is controlled tooutput the input from the selector 33 a.

[0076] In computing the interpolated pixel data G′ for pixel data G, theinterpolated pixel data G′ is computed supposing the CCD 3 consisting ofonly the pixel data G as shown in FIG. 5, of the inputted pieces ofpixel data R and G. Therefore, when computing the interpolated pixeldata G′ for a pixel for which no pixel data G exists, thehorizontal-direction interpolator 15 a uses filter [1, 0, 1]/2 tocompute the interpolated pixel data G′. When computing the interpolatedpixel data G′ for the pixel for which pixel data G exists, thehorizontal-direction interpolator 15 a uses filter [1, 0, 6, 0, 1]/8 tocompute the interpolated pixel data G′. Therefore, in. thehorizontal-direction interpolator 15 a that computes the interpolatedpixel data G′ by use of these filters, the frequency characteristics ofthese filters are as shown in FIGS. 6 and 7. Namely, filter [1, 0, 6, 0,1]/8 presents the frequency characteristic shown in FIG. 6, while filter[1, 0, 1]/2 presents the frequency characteristic shown in FIG. 7.According to these frequency characteristics, by use of these filters,the horizontal-direction interpolator 15 a can reduce the differencebetween the frequency characteristic of the interpolated pixel data G′in the pixel for which the pixel data G exists and the frequencycharacteristic of the interpolated pixel data G′ in the pixel for whichthe pixel data G does not exist.

[0077] Consequently, computing the interpolated pixel data G′ for eachpiece of pixel data G can obtain the interpolated pixel data G′ as shownin FIG. 8.

[0078] As described above, the horizontal-direction interpolator 15 acomputes the interpolated pixel data R22′ for the pixel data G22 in 2 hby use of filter [1, 0, 1]/2. In 1h, the horizontal-directioninterpolator 15 a can also compute the interpolated pixel data B11′ forpixel data G11.

[0079] When computing interpolated pixel data B22′ for pixel data G22 in2h, a filter shown in FIG. 9 is used. In what following, an example inwhich interpolated pixel data B′ is computed in a line having no pixeldata B.

[0080] When computing interpolated pixel data B22′ for pixel data G22, ahorizontal-direction interpolator 15 a′ constituted as shown in FIG. 9is used. It should be noted that, with reference to thehorizontal-direction interpolator 15 a′, components similar to thosepreviously described with the horizontal-direction interpolator 15 ashown in FIG. 4 are denoted by the same reference numerals and thedescription of the common components will be skipped. Namely, in thehorizontal-direction interpolator 15 a′ shown in FIG. 9, the input block30 is composed of a terminal 30 a into which the pixel data in 1h areinputted in the order of B10, G11, B12, G13, and B14 for example and aterminal 30 b into which the pixel data in 3h are inputted in the orderof B30, G31, B32, G33, and B34 for example. The horizontal-directioninterpolator 15 a′ also has an adder 35 into which the pixel data areinputted from the terminals 30 a and 30 b. The adder 35 performs anadding operation and a dividing operation on the inputted pixel data.Namely, the adder 35 performs an operation {pixel data B10+pixel dataB30}/2 for example. Like the horizontal-direction interpolator 15 a′shown in FIG. 4, the horizontal-direction interpolator 15 a′ shown inFIG. 9 outputs interpolated pixel data G′ and B′ by way of delaycircuits 31 a through 31 d, an adder 32, and a selector 33.

[0081] Namely, the horizontal-direction interpolator 15 a′ firstperforms arithmetic mean on the pixel data B corresponding to the pixelsarranged in vertically adjacent 1h and 3h for vertical interpolation,thereby computing interpolated pixel data B′ by vertically interpolatingas shown in FIG. 11 the pixel data B of the pixels arranged as shown inFIG. 10.

[0082] Next, the horizontal-direction interpolator 15 a′ computes thehorizontal-direction interpolated pixel data B′ for the pixel data B byputting the vertical-direction pixel data B and its interpolated pixeldata B′ through filter [1, 0, 6, 0, 1]/8 and filter [1, 0, 1]/2.

[0083] Namely, the horizontal-direction interpolator 15 a′ generates theinterpolated pixel data B22′ for a line having no pixel data Bhorizontally as follows. First, in the filter 32, filter [1, 0, 6, 0,1]/8 is applied to the pixel data B in 1h and 3h through the adders 32a, 32 c, and 32 d and filter [1, 0, 1]/2 is applied to the pixel data Gin 1h and 3h through the adder 32 b. The horizontal-directioninterpolator 15 a′ also has a subtraction processing circuit forsubtracting the value of the pixel data G obtained through filter [1, 0,1]/2 from the value of the pixel data B obtained through filter [1, 0,6, 0, 1]/8 and an addition processing circuit for adding theinterpolated pixel data G22′ obtained by the horizontal-directioninterpolator 15 a shown in FIG. 4 to the output of this subtractionprocessing circuit.

[0084] In other words, the horizontal-direction interpolator 15 a′subtracts the value of the pixel data G obtained through filter [1, 0,1]/2 from the value of the pixel data B obtained through filter [1, 0,6, 0, 1]/8 and adds the pixel data G′ to the resultant value of thesubtraction, outputting the interpolated pixel data B′ to a weightedaddition circuit 22.

[0085] Thus, the horizontal-direction interpolator 15 a′ shown in FIG. 9can compute the interpolated pixel data B22′ as shown in FIG. 12 evenfor the pixel data G22 corresponding to the pixel for which no pixeldata B exists as with 2h. Namely, according to the horizontal-directioninterpolator 15 a′ shown in FIG. 9, the interpolated pixel data B′ canbe computed for all pixels.

[0086] Further, when computing the interpolated pixel data B22′ for thepixel data G22, the horizontal-direction interpolator 15 a′ can use theinterpolated pixel data obtained by the following relation (2) and theabove-mentioned relation (1).

B 22′={(B 12′−G 12′)+(B 32′−G 32′)}/2+G 22′  (2)

[0087] According to the relation (2), the interpolated pixel data B22′can be computed by use of G12′, G32′, and G22′ computed by thehorizontal-direction interpolator 15 a and B32′ and B12′ computed by therelation (1).

[0088] On the other hand, the vertical-direction interpolator 15 b isconstituted as shown in FIG. 13. It should be noted that with referenceto the vertical-direction interpolator 15 b to be described below,components similar to those previously described with thehorizontal-direction interpolator 15 a are denoted by the same referencenumerals and the description of the common components will be skipped.

[0089] As shown in FIG. 13, the vertical-direction interpolator 15 b hasan input block 30 into which the pixel data R, pixel data G, and pixeldata B in vertical direction are sequentially inputted. The input block30 has a terminal 30 a into which the pixel data in 1h is inputted, aterminal 30 b into which the pixel data in 3h is inputted, a terminal 30c into which the pixel data in 0h is inputted, a terminal 30 d intowhich the pixel data in 4h is inputted, and a terminal 30 e into whichthe pixel data in 2h is inputted.

[0090] Like the above-mentioned horizontal-direction interpolator 15 a,the vertical-direction interpolator 15 b also has a filter 32, selector33, and an output block 34.

[0091] When pixel data B10, B30, G00, G40, and G20 are inputted in theterminals 30 a through 30 e, the vertical-direction interpolator 15 boutputs the pixel data inputted in the terminals 30 a and 30 b to theadder 32 b, the pixel data inputted in the terminals 30 c and 30 d tothe adder 32 a, and the pixel data inputted in the terminal 30 e to theadder 32 c. Then, like the horizontal-direction interpolator 15 a, thevertical-direction interpolator 15 b applies these pieces of input pixeldata to the above-mentioned relations (1) and (2) through the filter 32,thereby obtaining the interpolated pixel data R′, G′, and B′ for thepixel data R, G, and B.

[0092] The horizontal-direction interpolator 15 a and thevertical-direction interpolator 15 b that constitute the image datainterpolating block 15 are connected to an edge processor 15 c.Referring to FIG. 14, the edge processor 15 c comprises an input block40 composed of terminals 40 a through 40 c in which the delayed pixeldata G from the above-mentioned gamma correcting circuit 14 is inputted,delay circuits 41 a through 41 d into which the pixel data G is inputtedfrom the terminals 40 a through 40 c, a comparing block 42 for makingcomparison between the pieces of inputted pixel data G, a computingblock 43 for performing computation processing on a result obtained inthe comparing block 42, an output block 44 for controlling the outputaccording to a result obtained in the computing block 43, and an outputterminal 45 for outputting the resultant pixel data from the outputblock 44. The pixel data G is also inputted from the gamma correctingcircuit 14 into the edge processor 15 c. The following describes theedge processor 15 c by use of an example in which the values ofinterpolated pixel data G′ shown in FIG. 15 are controlled.

[0093] The input block 40 receives pixel data G1 through G4 around theinterpolated pixel data G′ of FIG. 15 obtained by interpolation by thehorizontal-direction interpolator 15 a and the vertical-directioninterpolator 15 b. When performing edge processing on the interpolatedpixel data in 2h for example, the input block 40 has the terminal 40 ainto which the pixel data G1 in 1h adjacent above the interpolated pixeldata G′ is inputted, the terminal 40 b into which the pixel data G2 andG3 horizontally adjacent to the interpolated pixel data G1 are inputted,and the terminal 40 c into which the pixel data G4 in 3h adjacent belowthe interpolated pixel data G′ is inputted. The terminals 40 a through40 c are connected to the delay circuits 41 a through 41 d as shown inFIG. 14. The pixel data G1, G2, G3, and G4 are delayed to be inputted inthe terminals 40 a through 40 c.

[0094] The delay circuits 41 a through 41 d are connected to thecomparing block 42 and the output block 44. The pixel data G1 through G4are inputted from the input block 40 into the delays circuits 41 athrough 41 d. The delay circuits 41 a through 41 d output the pixel dataG1 through G4 to the comparing block 42 and the output block 44 on aclock that is in synchronization with a clock on which these pixel dataG1 through G4 are inputted in the delay circuits.

[0095] The comparing block 42 is composed of comparators 42 a through 42f into which two of the four pieces of pixel data inputted in the inputblock 40 are inputted. Namely, the comparing block 42 includes thecomparator 42 a into which the pixel data G1 and G2 are inputted, thecomparator 42 b into which the pixel data G1 and G3 are inputted, thecomparator 42 c into which the pixel data G1 and G4 are inputted, thecomparator 42 d into which the pixel data G2 and G3 are inputted, thecomparator 42 e into which the pixel data G2 and G4 are inputted, andthe comparator 42 f into which the pixel data G3 and G4 are inputted.

[0096] The pixel data G1 is inputted in the comparator 42 a at itsterminal A and the pixel data G2 at its terminal B. The pixel data G1 isinputted in the comparator 42 b at its terminal A and the pixel data G3at its terminal B. The pixel data G1 is inputted in the comparator 42 cat its terminal A and the pixel data G4 at its terminal B. The pixeldata G2 is inputted in the comparator 42 d at its terminal A and thepixel data G4 at its terminal B. The pixel data G2 is inputted in thecomparator 42 e at its terminal A and the pixel data G4 at its terminalB. The pixel data G3 is inputted in the comparator 42 f at its terminalA and the pixel data G4 at its terminal B.

[0097] The comparison results are inputted from the comparing block 42into the computing block 43. Based on the inputted comparison results,the computing block 43 selects the second-place pixel data and thethird-place pixel data from the pixel data G1 through G4 inputted in theinput block 40. The computing block 43 is composed of plural selectors.If the comparison results of the comparator 42 a, the comparator 42 b,and the comparator 42 c are any of (L, H, H), (H, L, H), and (H, H, L)for example, the computing block 43 outputs a computing result with thepixel data G1 as the second place to the output block 44. If thecomparison results of the comparator 42 a, the comparator 42 d, and thecomparator 42 e are any of (H, L, L), (H, L, H), and (H, H, L) forexample, the computing block 43 outputs a computing result with thepixel data G2 as the third place to the output block 44.

[0098] The output block 44 is connected to the input block 40 and thecomputing block 43. The pixel data G1 through G4 are inputted from theinput block 40 into the output block 44. At the same time, thecomputational result is inputted from the computing block 43 into theoutput block 44. The output block 44 has a selector 44 a for outputtingpixel data according to the computational result indicative of thesecond place and a selector 44 b for outputting the pixel data G1through G4 according to the computational result indicative of the thirdplace. The output block 44 also has an “00” terminal into which thepixel data G1 inputted from the terminal 40 a is inputted, a terminal“10” into which the pixel data G2 inputted from the terminal 40 b isinputted, a terminal “01” into which the pixel data G3 inputted from theterminal 40 b is inputted, and a terminal “11” into which the pixel dataG4 inputted from the terminal 40 c is inputted.

[0099] An output block 45 is connected to the output block 44, thehorizontal-direction interpolator 15 a, and the vertical-directioninterpolator 15 b. The output block 45 outputs the pixel data G1 throughG4 indicative of the second place and the third place outputted from theoutput block 44 to the horizontal-direction interpolator 15 a and thevertical-direction interpolator 15 b.

[0100] When performing edge processing by the edge processor 15 c thusconstituted, the pixel data G1, G2, G3, and G4 around the interpolatedpixel data G′ obtained by interpolation by the horizontal-directioninterpolator 15 a and the vertical-direction interpolator 15 b areinputted in the input block 40 as shown in FIG. 15. A numeral in each ofthe pixel data G1 through G4 shown in FIG. 15 denotes the size thereof.The pixel data G1 is inputted in the input block 40 at the terminal 40a, the pixel data G2 is inputted at the terminal 40 b, the pixel data G3is also inputted at the terminal 40 b, and the pixel data G4 is inputtedat the terminal 40 c. Then, the input block 40 outputs these inputtedpixel data G1 through G4 to the comparators 42 a through 42 f by way ofthe delay circuits 41 a through 41 d as shown in FIG. 14.

[0101] Next, the comparators 42 a through 42 f make comparison betweenthe sizes of the inputted pixel data G1 through G4 and output comparisonresults to the. computing block 43. At this moment, if the pixel datainputted at the terminal A is found greater than the pixel data inputtedat the terminal B, each comparator outputs comparison result H to thecomputing block 43. If the pixel data inputted at the terminal A isfound equal to or smaller than the pixel data inputted at the terminalB, each comparator output comparison result L to the computing block 43.

[0102] According to the comparison results supplied from the comparators42 a through 42 f, the computing block 43 determines the second-placeand third-place pixel data G1 to G4 of the pixel data G1 through G4inputted in the input block 40 and outputs computational results to theoutput block 44. The computational result indicative of the second placeis outputted to the selector 44 a. The computational result indicativeof the third place is outputted to the selector 44 b. Then, theselectors 44 a and 44 b select, based on the computational results, thepixel data G1 to G4 that correspond to the second place and the thirdplace of the pixel data G1, G2, G3, and G4 and output the selected pixeldata to the output block 45.

[0103] The output block 45 outputs the received pixel data G1 to G4corresponding to the second place and the third place to thehorizontal-direction interpolator 15 a and the vertical-directioninterpolator 15 b.

[0104] Next, the horizontal-direction interpolator 15 a and thevertical-direction interpolator 15 b compute the size of interpolatedpixel data G′ from the pixel data G1 to G4 corresponding to the secondplace and the third place.

[0105] Therefore, according to the edge processor 15 c thus constituted,if the size of the pixel data G1 is 100, the size of the pixel data G2is 100, the size of the pixel data G3 is 100, and the size of the pixeldata G4 is 0 for example, the sizes of the pixel data between the secondplace and the third place are all 100, so that the size of theinterpolated pixel data G′ is limited to 100. Consequently, according tothe edge processor 15 c, the interpolated pixel data G1 obtained byvertically interpolating the pixel data shown in FIG. 15 is not computedas (100+0)=50.

[0106] The correlation value detecting block 16 receives pixel data fromthe above-mentioned gamma correcting circuit 14. The correlation valuedetecting block 16 includes a horizontal-direction correlation detector16 a for detecting a horizontal-direction correlation value and avertical-direction correlation detector 16 b for detecting avertical-direction correlation value.

[0107] To compute a horizontal correlation value Ch, thehorizontal-direction correlation detector 16 a uses a filter indicatedby a relation (3) shown below for a pixel for which pixel data G existsor a filter indicated by a relation (4) shown below for a pixel forwhich pixel data G does not exist. $\begin{matrix}{{Ch} = \begin{bmatrix}{- 1} & 0 & 2 & 0 & {- 1} \\0 & 0 & 0 & 0 & 0 \\{- 6} & 0 & 12 & 0 & {- 6} \\0 & 0 & 0 & 0 & 0 \\{- 1} & 0 & 2 & 0 & {- 1}\end{bmatrix}} & (3) \\{{Ch} = \begin{bmatrix}{- 1} & 0 & 2 & 0 & {- 1} \\0 & 0 & 0 & 0 & 0 \\{- 1} & 0 & 2 & 0 & {- 1}\end{bmatrix}} & (4)\end{matrix}$

[0108] To be more specific, the horizontal correlation value Ch iscomputed through LPF (Low-Pass Filter) [1, 0, 6, 0, 1] by use of therelation (3) if the pixel data G exists in vertical direction or throughLPF [1, 0, 1] by use of the relation (4) if the pixel data G does notexist. Also, the horizontal correlation value Ch is computed throughBPF,(Band-Pass Filter) [−1, 0, 2, 0, −1] in horizontal direction.

[0109] Referring to FIG. 16, the horizontal-direction correlationdetector 16 a includes an input block 50 into which pixel data areinputted from the gamma correcting circuit 14 at terminals 50 a through50 e, a filter 52 for generating horizontal correlation value Ch fromthe inputted pixel data, a selector 53 into which the horizontalcorrelation value Ch is inputted, and an output block 54 for outputtingthe horizontal correlation value Ch received from the selector 53.

[0110] The input block 50 sequentially receives the vertically arrangedpieces of pixel data shown in FIG. 3 from the gamma correcting circuit14. The input block 50 has a terminal 50 a at which the pixel data in 1his inputted, a terminal 50 b at which the pixel data in 3h is inputted,a terminal 50 c at which the pixel data in 0h is inputted, a terminal 50d at which the pixel data in 4h is inputted, and a terminal 50 e atwhich the pixel data in 2h is inputted.

[0111] The filter 52 includes an adder 52 a into which the pixel dataare inputted from the terminals 50 a and 50 b, an adder 52 b into whichthe pixel data are inputted from the terminals 50 c and 50 d, an adder52 c into which the pixel data are inputted from the terminal 50 e, andan adder 52 d into which the outputs of the adders 52 b and 52 c areinputted. Like the filter 33 shown in the above-mentionedhorizontal-direction interpolator 15 a and the vertical-directioninterpolator 15 b, the filter 52 constitutes filter [1, 0, 6, 0, 1]/8 bythe adders 52 b, 52 c, and 52 d and filter [1, 0, 1]/2 by the adder 52a.

[0112] The selector 53 has a selector 53 a into which the output of theadder 52 d and the-pixel data from the terminal 50 e are inputted and aselector 53 b into which the output of the adder 52 a and the output ofthe selector 53 a are inputted. The selectors 53 a and 53 b arecontrolled by a control signal supplied from the control block 10. To bemore specific, when the control signal H comes from the control block10, the selector 53 a outputs the pixel data received through the adders52 b, 52 c, and 52 d. When the control signal L comes from the controlblock 10, the selector 53 a outputs the pixel data received from theterminal 50 e. The selector 53 b outputs, according to the controlsignal received from the control block 10, the horizontal correlationvalue Ch that passed the adder 52 a or the pixel data that passed theselector 53 a.

[0113] It should be noted that, in the horizontal-direction correlationdetector 16 a, the pixel data from which a correlation value is computedmay be inputted in the selector 53 without passing the adders 52 b, 52c, and 52 d. Thus, use of the pixel data G as a correlation valuewithout passing the filter 52 c an restrict the band of the pixel data Gfrom lowering and simplify the circuitry.

[0114] The selector 53 b is controlled to pass the outputs of the adders52 b, 52 c, and 52 d or the output from the terminal 50 e for a pixelfor which the pixel data G exists. The selector 53 b is controlled topass the output of the adder 52 a for a pixel for which the pixel data Gdoes not exist.

[0115] The output block 54 outputs the horizontal correlation value Chreceived from the selector 53 b. The output block 54 is connected to thenoise canceling block 17 through BPF [−1, 0, 2, 0, −1] in horizontaldirection not shown, outputting the horizontal correlation value Ch tothe noise canceling block 17.

[0116] The vertical-direction correlation detector 16 b computes avertical correlation value Cv by use of a filter indicated in a relation(5) shown below for a pixel for which the pixel data G exists or afilter indicated in a relation (6) shown below for a pixel for which thepixel data G does not exist. $\begin{matrix}{{Cv} = \begin{bmatrix}{- 1} & 0 & {- 6} & 0 & {- 1} \\0 & 0 & 0 & 0 & 0 \\2 & 0 & 12 & 0 & 2 \\0 & 0 & 0 & 0 & 0 \\{- 1} & 0 & {- 6} & 0 & {- 1}\end{bmatrix}} & (5) \\{{Cv} = \begin{bmatrix}{- 1} & 0 & {- 1} \\0 & 0 & 0 \\2 & 0 & 2 \\0 & 0 & 0 \\{- 1} & 0 & {- 1}\end{bmatrix}} & (6)\end{matrix}$

[0117] To be more specific, the vertical correlation value Cv iscomputed through BPF [−1, 0, 2, 0, −1] by use of the relations (5) and(6) in vertical direction. If the pixel data G exists, the verticalcorrelation value Cv is computed through LPF [1, 0, 6, 0, 1] by use ofthe relation (5) in horizontal direction or through LPF [1, 0, 1] by useof the relation (6) if the pixel data G does not exist.

[0118] Referring to FIG. 17, the vertical-direction correlation detector16 b includes an input block 55 into which pixel data are inputtedthrough BPF [−1, 0, 2, 0, −1] in vertical direction not shown, delayscircuits 56 a through 56 d into which the pixel data are inputted fromthe input block 55, a filter 57 for generating a vertical correlationvalue Cv from the pixel data received from the delay circuits 56 athrough 56 d, a selector 58 into which the vertical correlation value Cvis inputted through the filter 57, and an output block 59 for outputtingthe vertical correlation value Cv received from the selector 58.

[0119] The input block 55 sequentially receives the pixel data from thegamma correcting circuit 14 through BPF [−1, 0, 2, 0, −1] in verticaldirection not shown. Then, the input block 55 outputs the received pixeldata to the delay circuits 56 a through 56 d that are similar inconstitution to the delay circuit 31 provided in the above-mentionedhorizontal-direction interpolator 15 a.

[0120] The filter 57 is similar in constitution to the filter 52provided in the horizontal-direction correlation detector 16 a andincludes adders 57 a, 57 b, 57 c, and 57 d. Like the filter 53 providedin the horizontal-direction correlation detector 16 a, the filter 57constitutes filter [1, 0, 6, 0, 1]/8 by the adders 57 b, 57 c, and 57 dand filter [1, 0, 1]/2 by the adder 57 a. It should be noted that, likethe horizontal-direction correlation detector 16 a, thevertical-direction correlation detector 16 b may. input the pixel datafrom which the correlation value Cv is computed into the selector 58without passing the adders 57 b, 57 c, and 57 d.

[0121] The selector 58 is similar in constitution to the selector 53provided in the horizontal-direction correlation detector 16 a and hasselectors 58 a and 58 b. The selectors 58 a and 58 b are controlled by acontrol signal supplied from the control block 10.

[0122] The selector 58 b is controlled to pass the outputs of the adders57 b, 57 c, and 57 d or the output of the delay circuit 56 b for a pixelfor which pixel data G exists. For a pixel for which pixel data G doesnot exist, the selector 58 b is controlled to pass the output of theadder 57 a.

[0123] The output block 59 outputs the vertical correlation value Cvreceived from the selector 58 b. The output block 59 is connected to thenoise canceling block 17 and outputs the vertical correlation value Cvto the noise canceling block 17.

[0124] The correlation value detecting block 16 thus constituted cancompute a correlation value C only from the pixel data G for examplethrough the circuits that use the relations (3) through (6), therebyproviding the horizontal and vertical correlation values Ch and Cvwithout being affected by the color of a subject.

[0125] Referring to FIG. 2, the noise canceling block 17 has a noisecanceler 17 a connected to the horizontal-direction correlation detector16 a and a noise canceler 17 b connected to the vertical-directioncorrelation detector 16 b. The noise cancelers 17 a and 17 b aconstitution similar to that shown in FIG. 18.

[0126] Referring to FIG. 18, the noise cancelers 17 a and 17 b includeeach an absolute value converting circuit 60 into which the correlationvalue C is inputted from the correlation detectors 16 a and 16 b, asubtracting circuit 61 into which the absolute correlation value isinputted, and a limiter 62 into which the subtracted correlation value Cis inputted.

[0127] The absolute value converting circuit 60 is composed of anexclusive OR gate 60 a and an adder 60 b for example. The absolute valueconverting circuit 60 makes absolute the received correlation value C toprovide a positive value. Then, the absolute value converting circuit 60outputs the resultant absolute correlation value C to the subtractingcircuit 61.

[0128] The subtracting circuit 61 is constituted by a subtractor 61 afor example. The correlation value C is inputted from the absolute valueconverting circuit 60 into the subtractor 61 a. The subtractor 61 areceives a control signal from the control block 10 indicative of asubtrahend for subtracting a predetermined value from the inputtedcorrelation value C. Then, the subtractor 61 a subtracts the subtrahendfrom the correlation value C according to the control signal. Thus, byperforming subtraction processing, the subtractor 61 a subtracts, asindicated by a dashed line of FIG. 19A, the output of the correlationvalue C as indicated by a solid line of FIG. 19A. Then, the subtractingcircuit 61 outputs the subtracted correlation value C to the limiter 62.

[0129] The limiter 62 is composed of an inverter 62 a and an AND gate 62b for example. The limiter 62 performs processing so that thecorrelation value C subtracted by the subtracting circuit 61 to be anegative value as shown in FIG. 19B becomes 0. Then, the limiter 62outputs the resultant correlation value C to the offset circuit 18.

[0130] The noise canceling block 17 thus constituted performssubtracting processing on the inputted correlation value C to eliminateminute correlation values C, thereby canceling the noises at minutevalues. According to the noise canceling block 17, the correlation valueC is computed by passing the same through the BPF, so that thecorrelation value C computed for the noise of the CCD 3 itself can becanceled. In addition, according to the noise canceling block 17, if anoise component is included in the pixel data generated by the CCD 3 andthe correlation value C is computed for that noise, the minutecorrelation values can be subtracted. Therefore, according to the noisecanceling block 17, interpolated pixel data can be weighted by use ofthe correlation value C having few noises, thereby preventing imagedegradation due to the false-color signal included in an output image.

[0131] Referring to FIG. 2, the offset circuit 18 has an offset circuit18 a into which a horizontal correlation value C is inputted from thenoise canceler 17 a and an offset circuit 18 b into which a verticalcorrelation value C is inputted from the noise canceler 17 b. Theseoffset circuits 18 a and 18 b have a similar constitution as shown inFIG. 20.

[0132] The offset circuits 18 a and 18 b are each constituted by anadder 65 for example as shown in FIG. 20. The correlation value C isinputted in the adder 65 from the noise cancelers 17 a and 17 b. Acontrol signal indicative of a predetermined offset value is alsoinputted in the adder 65 from the control block 10.

[0133] When the correlation value C is inputted from the noise cancelers17 a and 17 b, the adder 65 adds the offset value to the correlationvalue C. Then, the adder 65 outputs a result of the addition to thenormalizing circuit 19. Namely, the offset circuits 18 a and 18 b addthe offset value to the correlation value C as indicated by a dashedline of FIG. 21 supplied from the noise cancelers 17 a and 17 b forexample to produce a correlation value C as indicated by a solid line ofFIG. 21.

[0134] Thus, in the offset circuits 18 a and 18 b, the offset value isadded to a correlation value C, so that if the amplitude of the inputtedcorrelation value C is about 0, a large correlation value C can beprovided. The offset circuits 18 a and 18 b thus constituted can preventthe horizontal correlation value Ch and the vertical correlation valueCv from being drastically changed even if the amplitudes of ahigh-frequency signal and these correlation values are minute in thecase of pixel data for which no correlation value C can be obtained bythe above-mentioned correlation detecting block 16, for example pixeldata constituting the image data in which color change takes place foreach pixel. Namely, according to the offset circuits 18 a and 18 b,adding the offset value to a correlation value C makes. the interpolatedpixel data to be weighted by a correlation value C approach thedirection in which the interpolation is made by arithmetic mean.Therefore, according to the offset circuits 18 a and 18 b, if theamplitude of an inputted correlation value C is minute or in the case ofa high-frequency signal changing for each pixel as shown in FIG. 22, thehorizontal correlation value Ch and the vertical correlation value Cv donot drastically change from 1 to 0 and 0 to 1 respectively in adjacentpixels.

[0135] Referring to FIG. 2, the normalizing circuit 19 is composed of anadder 19 a into which a horizontal correlation value Ch and a verticalcorrelation value Cv are inputted from the offset circuits 18 a and 18 band a divider 19 b into which the vertical correlation value Cv and theoutput of the adder 19 a are inputted.

[0136] The normalizing circuit 19 thus constituted adds the verticalcorrelation value Cv and the horizontal correlation value Ch by theadder 19 a and outputs a result of this addition to the divider 19 b, inwhich the vertical correlation value Cv is divided by the result of theaddition. Then, the normalizing circuit 19 computes a verticalcorrelation value Cv indicated by a relation (7) shown below. Thehorizontal correlation value Ch can be expressed as a relative value ofthe vertical correlation value Cv as indicated by a relation (8) shownbelow. $\begin{matrix}{{{Vertical}\quad {correlation}\quad {value}} = \frac{Cv}{{Cv} + {Ch}}} & (7) \\{{{Horizontal}\quad {correlation}\quad {value}} = {1 - \frac{Cv}{{Cv} + {Ch}}}} & (8)\end{matrix}$

[0137] The bias correcting circuit 20 is constituted by an adder 20 a asshown in FIG. 23. The vertical correlation value Cv indicated by therelation (7) is inputted in the bias correcting circuit 20 from thenormalizing circuit 19. A correction value α is inputted into the adder20 a from the control block 10. This correction value a is generated bythe control block 10 and adjusted in a range of −1 to 1 according to thesetting of the CCD 3 for example.

[0138] The bias correcting circuit 20 adds the inputted verticalcorrelation value Cv to the inputted bias correcting value α. As aresult of this addition, the vertical correlation value Cv becomes asindicated by a relation (9) shown below. $\begin{matrix}{{{Vertical}\quad {correlation}\quad {value}} = {\frac{Cv}{{Cv} + {Ch}} + \alpha}} & (9)\end{matrix}$

[0139] Therefore, as shown in FIG. 24 for example, the bias correctingcircuit 20 can change the inputted vertical correlation value Cvindicated by a dashed line to a value between the solid lines by addingthe correction value α. Namely, by adding the correction value a to avertical correlation value Cv, the bias correcting circuit 20 cancontrol and correct the vertical correlation value Cv by controlling thecorrection value a inputted from the control block 10 if the verticalcorrelation value Cv and the horizontal correlation value Ch do notreach a same level due to the distortion or the like in a signal comingfrom the CCD 3. In addition, if the relationship between verticalcorrelation and horizontal correlation cannot be correctly detected duethe aspect ratio of the CCD or a distortion caused by detection of ananalog signal outputted from the CCD, the bias correcting circuit 20 cancontrol the balance between the horizontal correlation value Ch and thevertical correlation value Cv by controlling the correction value asupplied from the control block 10.

[0140] The emphasis/deemphasis circuit 21 is composed of a subtractor 21a into which the vertical correlation value Cv is inputted from the biascorrecting circuit 20, a multiplier 21 b into which the subtractedvertical correlation value Cv is inputted, an adder 21 c into which themultiplied vertical correlation value Cv is inputted, and a limiter 21 dinto which the added vertical correlation value Cv is inputted.

[0141] In the subtractor 21 a, the vertical correlation value Cv havinga value 0 to 1 is inputted from the bias correcting circuit 20 andsubtraction processing is performed on the inputted vertical correlationvalue Cv. The subtractor 21 a subtracts only 0.5 from the verticalcorrelation value Cv. The multiplier 21 b perform multiplicationprocessing on the vertical correlation value Cv based on a controlsignal indicative of a multiplier inputted from the control block 10.The adder 21 c adds only 0.5 to the vertical correlation value Cv. Thelimiter 21 d limits the inputted.vertical correlation value Cv in acertain range.

[0142] In the emphasis/deemphasis circuit 21, when the verticalcorrelation value Cv is inputted from the bias correcting circuit 20,first the subtractor 21 a subtracts only 0.5 from the verticalcorrelation value Cv. Then multiplication processing is carried out onthe subtracted vertical correlation value Cv. In this processing, theslope of the input/output of characteristic of the vertical correlationvalue shown by the solid line in FIG. 26 is varied to the slope shown bythe dotted line or the dashed line in FIG. 26 corresponding to themultiplier inputted from the control block 10. Next, the adder 21 c addsthe 0.5 which has been subtracted by the subtractor 21 a to the verticalcorrelation value Cv. The limiter 21 d limits the vertical correlationvalue Cv in a range of 0 to 1.

[0143] The emphasis/deemphasis circuit 21 thus constituted multipliesthe vertical correlation value Cv by the multiplier supplied from thecontrol block 10 to vary the slope of the input/output characteristic ofthe vertical correlation value Cv as shown in FIG. 26. Therefore,according to the emphasis/deemphasis circuit 21, the verticalcorrelation value Cv can be varied by varying multiplier supplied fromthe control block 10. Consequently, according to the emphasis/deemphasiscircuit 21, when weighting interpolated pixel data as will be described,control may be made so that, by varying a correlation value forweighting the interpolated pixel data, the interpolated data placesemphasis on the correlation or interpolation is performed to make theinterpolated pixel data approach arithmetic mean. In addition, accordingto the emphasis/deemphasis circuit 21, a correlation value can becontrolled by varying a multiplier even if the amount of light inputtedin the CCD 3 is small and therefore the output of the CCD 3 involves alot of noises to fail the correct computation of the correlation value.

[0144] Referring to FIG. 2, the weighted addition circuit 22 is composedof a subtractor 22 a into which the vertical correlation value Cv isinputted to generate normalized horizontal correlation value Ch, amultiplier 22 b into which the normalized horizontal correlation valueCh is inputted, and a multiplier 22 c into which the verticalcorrelation value Cv is inputted, and an adder 22 d into which thevertical and horizontal interpolated pixel data are inputted.

[0145] In the weighted addition circuit 22′ the vertical correlationvalue Cv is inputted from the emphasis/deemphasis circuit 21 into thesubtractor 22 a and the multiplier 22 c. The subtractor 22 a subtractsthe vertical correlation value Cv from 1 to generate the horizontalcorrelation value Ch. Then, the subtractor 22 a outputs the generatedhorizontal correlation value Ch to the multiplier 22 b.

[0146] The multiplier 22 b receives the vertical interpolated pixel datafrom the vertical-direction interpolator 15 b and the horizontalcorrelation value Ch from the subtractor 22 a. The multiplier 22 bmultiplies the inputted vertical-direction interpolated pixel data bythe inputted horizontal correlation value Ch. Thus, the multiplier 22 bperforms weighting by multiplying the vertical-direction interpolatedpixel data by the horizontal correlation value Ch.

[0147] The multiplier 22 c receives the horizontal-directioninterpolated pixel data from the horizontal-direction interpolator 15 aand the vertical correlation value Cv. The multiplier 22 c multipliesthe inputted horizontal-direction interpolated pixel data by theinputted vertical correlation value Cv. Thus, the multiplier 22 cperforms weighting by multiplying the horizontal-direction interpolatedpixel data by the vertical correlation value Cv.

[0148] The adder 22 d receives the horizontal-direction interpolatedpixel data weighted by the multiplier 22 c and the vertical-directioninterpolated pixel data weighted by the multiplier 22 b. The adder 22 dadds the inputted horizontal-direction interpolated pixel data to theinputted vertical-direction interpolated pixel data. Thus, by performingthe addition processing, the adder 22 d obtains the interpolated pixeldata weighted by the vertical and horizontal correlation values. Then,the adder 22 d outputs the obtained interpolated pixel data to thecontour correcting circuit 23.

[0149] The contour correcting circuit 23 is connected to the adder 22 dof the weighted addition circuit 22. The interpolated pixel data isinputted in the adder 22 d into the contour correcting circuit 23 a anda contour emphasis signal is also inputted extracted from a circuit notshown. This contour emphasis signal compensate the degraded response ofthe CCD 3 and emphasizes the definition thereof. The contour correctingcircuit 23 adds the inputted contour emphasis signal to the inputtedinterpolated pixel data and outputs the result to the Y/C converter 24.

[0150] The Y/C converter 24 is connected to the contour correctingcircuit 23 and receives the interpolated pixel data therefrom. The Y/Cconverter 24 converts the inputted interpolated pixel data consisting ofR, G, and B into a Y/C signal consisting of a luminance signal (Y) and acolor difference signal (C). Then, the Y/C converter 24 outputs theresultant Y/C signal to the color-difference signal suppresser 25.

[0151] The color-difference signal suppresser 25 is connected to the Y/Cconverter 24 and receives the Y/C signal therefrom. As shown in FIG. 27,the color-difference signal suppresser 25 is composed of a BG-datasuppresser 25 a into which a color difference B-G of pixel data with oneline consisting of pixel data G and B is inputted and an RG datasuppresser 25 b into which a color difference R-G of pixel data with oneline consisting of pixel data G and R is inputted.

[0152] The BG data suppresser 25 a has input blocks 70 a through 70 cinto which a color difference B′-G′ of interpolated pixel data G1 and B1is inputted, absolute value converting circuits 71 a through 71 c intowhich the color difference B′-G′ is inputted from the input blocks 70 athrough 70 c, comparators 72 a through 72 c into which the absolutevalue color difference B′-G′ is inputted from the absolute valueconverting circuits 71 a through 71 c, a computing circuit 73 into whicha comparison result is inputted from the comparators 72 a through 72 c,a selector 74 into which a computation result is inputted from thecomputing circuit 73, and an output block 75 into which the pixel datais inputted from the selector 74.

[0153] The color difference B′-G′ in vertical direction is inputted inthe input block 70 a. The color difference B′-G′ in horizontal directionis inputted in the input block 70 b. The color difference B′-G′ weightedby a correlation value is inputted in the input block 70 c. The inputblock 70 b outputs the inputted color difference B′-G′ to the absolutevalue converting circuit 71 a. The input block 70 b outputs the inputtedcolor difference B′-G′ to the absolute value converting circuit 71 b.The input block 70 c outputs the inputted color difference B′-G′ to theabsolute value converting circuit 71 c.

[0154] The absolute value converting circuits 71 a through 71 c are eachcomposed of an exclusive OR gate 76 and an adder 77 for example. Theabsolute value converting circuits 71 a through 71 c make absolute theinputted color difference B′-G′ into a positive value. The absolutevalue converting circuits 71 a through 71 c output the absolute valuecolor difference B′-G′ to the comparators 72 a through 72 c.

[0155] The comparator 72 a receives at its terminal B the colordifference B′-G′ through the absolute value converting circuit 71 a andat its terminal A the color difference B′-G′ through the absolute valueconverting circuit 71 c. The comparator 72 b receives at its terminal Athe color difference B′-G′ through the absolute value converting circuit71 a and at its terminal B the color difference B′-G′ through theabsolute value converting circuit 71 b. The comparator 72 c receives atits terminal A the color difference B′-G′ through the absolute valueconverting circuit 71 b and at its terminal B the color difference B′-G′through the absolute value converting circuit 71 c. The comparators 72 athrough 72 c each compare the magnitudes of the color differences B′-G′inputted at the terminals A and B. If the color difference B′-G′inputted at the terminal A is found greater than that inputted at theterminal B, the comparators output comparison result H to the computingcircuit 73. If the color difference B′-G′ inputted at the terminal A isfound equal to or smaller than that inputted at the terminal B, thecomparators output a comparison result L to the computing circuit 73.

[0156] The computing circuit 73 receives the comparison result from thecomparators 72 a through 72 c and a control signal from the controlblock 10. The computing circuit 73 generates a computation result basedon these comparison result and the control signal and outputs thegenerated computation result to the selector 74.

[0157] If the control signal H comes, the computing circuit 73 outputs acomputation result 11. If the control signal L comes, the computingcircuit 73 generates a computation result based on the comparisonresults coming from the comparators 72 a through 72 c. If the comparisonresults of the comparators 72 a, 72 b, and 72 c are H, L, and Xrespectively, the computing circuit 73 outputs computation result “00”to the selector 74. If the comparison results of the comparators 72 a,27 b, and 72 c are X, H, and L respectively, the computing circuit 73outputs computation result “01” to the selector 74. If the comparisonresults of the comparators 72 a, 72 b, and 72 c are L, X, and H, thecomputing circuit 73 outputs computation result “10” to the selector 74.

[0158] The selector 74 receives the computation result from thecomputing circuit 73 and the color differences B′-G′ from the inputblocks 70 a through 70 c. The selector 74 receives at its “11” terminaland “10” terminal the color difference B′-G′ from the input block 70 c,at its terminal “01” the color difference B′-G′ from the input block 70b, and at its terminal “00” the color difference B′-G′ from the inputblock 70 a. If the computation result “11” comes, the selector 74outputs the color difference B′-G′ received at the terminal “11”. If thecomputation result “10” comes, the selector 74 outputs the colordifference B′-G′ received at the terminal “10”. If the computationresult “01” comes, the selector 74 outputs the color difference B′-G′received at the terminal “01”. If the computation result “00” comes, theselector 74 outputs the color difference B′-G′ received at the terminal“00”.

[0159] The RG data suppresser 25 b receives color difference R′-G′ atthe input blocks 70 a through 70 c. The RG data suppresser 25 b puts thecolor difference R′-G′ through the absolute value converting circuit 71,the comparator 72, the computing circuit 73, and the selector 74 toselect the smallest color difference R′-G′ to be outputted at the outputblock 75.

[0160] Therefore, as shown in FIG. 28A, the color difference signalsuppresser 25 thus constituted selects the smallest interpolated pixeldata Rh and Gh of the interpolated pixel data Rv and Gv for verticallyarranged pixel data R and G, the Rh and Gh for horizontally arrangedpixel data R and G, and the color difference of weighted interpolatedpixel data Rc and Gc. In addition, the color difference signalsuppresser 25 selects the. interpolated pixel data R′-G′ nearest to 0 ofthe compared interpolated pixel data as shown in FIG. 28B.

[0161] The color difference signal suppresser 25 thus constitutedoutputs the interpolated pixel data received at the input blocks 70 athrough 70 c that has the smallest absolute value. Therefore, when pixeldata is generated by the interpolated pixel data weighted by acorrelation value in a band in which no correlation can be obtained, thecolor difference suppresser 25 can prevent an image that has a highbrightness and is achromatic (for example, a glistening glass) fromtaking on a false color. Consequently, the color-difference signalsuppresser 25 can prevent a color turn distortion from occurring even ina frequency range in which no correlation is obtained.

[0162] The output block 75 outputs the interpolated pixel data from theselector 74 to the output block 26. The output block 26 is a terminal toa recording medium for recording pixel data, a display monitor, oroutside equipment for example.

[0163] In the foregoing, the description has been made using the cameraapparatus 1 having the CCD 3 of primary color coding for example. Itwill be apparent to those skilled in the art that the present inventionis also applicable to any solid state image sensors of coding in whichthe majority color of the colors presented by the pixel data included inimage data is arranged in a checker.

[0164] While the preferred embodiments of the present invention havebeen described using specific terms, such description is forillustrative purposes only, and it is to be understood that changes andvariations may be made without departing from the spirit or scope of theappended claims.

What is claimed is:
 1. A camera signal processing apparatus comprising:an interpolated pixel data generating means for interpolating pixel datain at least two directions based on a position of said pixel data and/orpixel data around said position, said pixel data being generated basedon an imaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; a correlationdetecting means for detecting a correlation value indicative of a degreeof correlation in each of said at least two directions of saidinterpolated pixel data generated by said interpolated pixel datagenerating means; a normalizing means for normalizing said correlationvalue detected by said correlation detecting means in each of said atleast two directions to generate a normalized value indicative of arelative value of said correlation value of each of said at least twodirections; a correcting means for adding a predetermined correctionvalue to said normalized value generated by said normalizing means; aweighting means for weighting said interpolated pixel data in each ofsaid at least two directions generated by said interpolated pixel datagenerating means with said normalized value obtained by adding saidcorrection value to said interpolated pixel data in each of said atleast two directions and adding together the weighted interpolated pixeldata in all of said at least two directions to generate interpolatedpixel data; and an image generating means for generating an image basedon said interpolated pixel data weighted by said weighting means.
 2. Thecamera signal processing means as set forth in claim 1, furthercomprising: a control means for controlling said correcting means,wherein said control means generates said correction value in an rangeof −1 to 1 to have said correcting means add said correction value tosaid normalized value.
 3. The camera signal processing means as setforth in claim 1, further comprising: a limiting means for limiting saidnormalized value corrected in each of.said at least two directions bysaid correcting means, wherein said limiting means limits saidnormalized value detected by said correlation detecting means in each ofsaid at least two directions to a range of 0 to
 1. 4. A camera signalprocessing method comprising the steps of: interpolating pixel data inat least two directions based on a position of said pixel data and/orpixel data around said position, said pixel data being generated basedon an imaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data; normalizingsaid correlation value in each of said at least two directions togenerate a normalized value indicative of a relative value of saidcorrelation value in each of said at least two directions; adding apredetermined correction value to said normalized value; weighting saidinterpolated pixel data in each of said at least two directions withsaid normalized value obtained by adding said correction value to saidinterpolated pixel data in each of said at least two directions andadding together the weighted interpolated pixel data in all of said atleast two directions to generate interpolated pixel data; and generatingan image based on said weighted interpolated pixel data.
 5. The camerasignal processing method as set forth in claim 4, wherein, when addingsaid normalized value to said correction value, said correction value isgenerated in a range of −1 to
 1. 6. The camera signal processing methodas set forth in claim 4, wherein, after adding said correction value tosaid normalized value, said normalized value is controlled to fallwithin a range of 0 to
 1. 7. A camera signal processing apparatuscomprising: an interpolated pixel data generating means forinterpolating pixel data in at least two directions based on a positionof said pixel data and/or pixel data around said position, said pixeldata being generated based on an imaging signal coming from asolid-state image sensor in which an imaging light enters through acolor filter having a different spectral characteristic for each pixel,thereby separately generating interpolated pixel data in said at leasttwo directions; a correlation detecting means for detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data generated bysaid interpolated pixel data generating means; and a weighting means forweighting said interpolated pixel data in each of said at least twodirections generated by said interpolated pixel data generating meanswith said correlation value detected by said correlation value detectingmeans in each of said at least two directions and adding the weightedinterpolated pixel data in said at least two directions to generateinterpolated pixel data.
 8. The camera signal processing apparatus asset forth in claim 7, wherein said interpolated pixel data generatingmeans performs interpolation on all pixels to which pixel data to begenerated based on a signal coming from said solid-state image sensor isgiven.
 9. The camera signal processing apparatus as set forth in claim8, therein said interpolated pixel data generating means generates saidinterpolated pixel data by applying a filter [1, 4, 6, 4, 1]/8 in saidat least two directions.
 10. The camera signal processing apparatus asset forth in claim 7, wherein, if a line to be interpolated has no pixeldata indicative of a color to be interpolated, said interpolated pixeldata generating means generates said pixel data indicative of said colorby use of pixel data of a line of substantially a same direction as thatof said line to be interpolated and adjacent to thereto.
 11. A camerasignal processing method comprising the steps of: interpolating pixeldata in at least two direction based on a position of said pixel dataand/or pixel data around said position, said pixel data being generatedbased on an imaging signal coming from a solid-state image sensor inwhich an imaging light enters through a color filter having a differentspectral characteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data; and weightingsaid interpolated pixel data in each of said at least two directionswith said correlation value in each of said at least two directions andadding the weighted interpolated pixel data in said at least twodirections to generate interpolated pixel data.
 12. The camera signalprocessing method as set forth in claim 11, wherein said interpolatedpixel data is generated for all pixels to which pixel data to begenerated based on a signal coming from said solid-state image sensor isgiven.
 13. The camera signal processing method as set forth in claim 12,wherein said interpolated pixel data is generated by applying a filter[1, 4, 6, 4, 1]/8 in said at least two directions.
 14. The camera signalprocessing method as set forth in claim 11, wherein, if a line to beinterpolated has no pixel data indicative of a color to be interpolated,said pixel data indicative of said color is generated by use of pixeldata of a line of substantially a same direction as that of said line tobe interpolated and adjacent to thereto.
 15. A camera signal processingapparatus comprising: an interpolated pixel data generating means forinterpolating pixel data in at least two directions based on a positionof said pixel data and/or pixel data around said position, said pixeldata being generated based on an imaging signal coming from asolid-state image sensor in which an imaging light enters through acolor filter having a different spectral characteristic for each pixel,thereby separately generating interpolated pixel data in said at least,two directions; an edge processing means for computing a limit value foreach of said interpolated pixel data based on pixel data around saideach of interpolated pixel data generated by said interpolated pixeldata generating means; a correlation detecting means for detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data generated bysaid interpolated pixel data generating means; a weighting means forweighting said interpolated pixel data in each of said at least twodirections generated by said interpolated pixel data generating meanswith said correlation value detected by said correlation detecting meansin each of said at least two directions and adding together the weightedinterpolated pixel data in all of said at least two directions togenerate interpolated pixel data; and an image generating means forgenerating an image based on said interpolated pixel data generated bysaid interpolated pixel data generating means; wherein said interpolatedpixel data generating means generates interpolated pixel data for saidpixel data based on said limit value computed by said edge processingmeans and said image generating means generates said image based on thegenerated interpolated pixel data.
 16. The camera signal processingapparatus as set forth in claim 15, wherein said edge processing meanscomputes said limit value for interpolated pixel data for pixel dataindicative of a majority color in all pixel data.
 17. A camera signalprocessing method comprising the steps of: interpolating pixel data inat least two directions based on a position of said pixel data and/orpixel data around said position, said pixel data being generated basedon an imaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; computing alimit value for each of said interpolated pixel data based on pixel dataaround said each of interpolated pixel data; generating, based on saidlimit value, interpolated pixel data in each of said at least twodirections based on said position of said pixel data and said pixel dataaround said position; detecting a correlation value indicative of adegree of correlation in each of said at least two directions of saidinterpolated pixel data; weighting said interpolated pixel data in eachof said at least two directions with said correlation value of each ofsaid at least two directions and adding together the weightedinterpolated pixel data in all of said at least two directions togenerate interpolated pixel data; and generating an image based on theweighted interpolated pixel data.
 18. The camera signal processingmethod as set forth in claim 17, wherein said limit value is computedfor interpolated pixel data for pixel data indicative of a majoritycolor in all pixel data.
 19. A camera signal processing apparatuscomprising: an interpolated pixel data generating means forinterpolating pixel data in at least two directions based on a positionof said pixel data and/or pixel data around said position; said pixeldata being generated based on an imaging signal coming from asolid-state image sensor in which an imaging light enters through acolor filter having a different spectral characteristic for each pixel,thereby separately generating interpolated pixel data in said at leasttwo directions; a correlation detecting means for detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data generated bysaid interpolated pixel data generating means; a noise canceling meansfor subtracting a predetermined value from said correlation valuedetected by said correlation value detecting means; a weighting meansfor weighting said interpolated pixel data in each of said at least twodirections generated by said interpolated pixel data generating meanswith said correlation value detected by said correlation detecting meansin each of said at least two directions and adding together the weightedinterpolated pixel data in all of said at least two directions togenerate interpolated pixel data; and an image generating means forgenerating an image based on said interpolated pixel data weighted bysaid weighting means.
 20. The camera signal processing apparatus as setforth in claim 19, wherein said noise canceling means has a subtractingmeans for performing subtraction on the correlation values of said atleast two directions and a control means for generating a subtrahend forperforming subtraction in said subtracting means, wherein saidsubtracting means receives said subtrahend generated by said controlmeans to perform subtraction based on said subtrahend.
 21. The camerasignal processing apparatus as set forth in claim 19, wherein said noisecanceling means comprising: an absolute value converting means formaking absolute the inputted correlation value in each of said at leasttwo directions; a subtracting means for subtracting a predeterminedvalue from the correlation value made absolute by said absolute valueconverting means in each of said at least two directions; and a limitingmeans for limiting said correlation value subtracted by said subtractingmeans in each of said at least two directions to a positive value.
 22. Acamera signal processing method comprising the steps of: interpolatingpixel data in at least two directions based on a position of said pixeldata and/or pixel data around said position, said pixel data beinggenerated based on an imaging signal coming from a solid-state imagesensor in which an imaging light enters through a color filter having adifferent spectral characteristic for each pixel, thereby separatelygenerating interpolated pixel data in said at least two directions;detecting a correlation value indicative of a degree of correlation ineach of said at least two directions of said interpolated pixel data;subtracting a predetermined value from said correlation value; andweighting said interpolated pixel data in each of said at least twodirections with the subtracted correlation value in each of said atleast two directions to generate interpolated pixel data obtained byadding together the weighted interpolated pixel data in all of said atleast two directions.
 23. The camera signal processing method as setforth in claim 22, wherein subtraction is performed on said correlationvalue in each of said at least two directions based on an inputtedsubtrahend.
 24. The camera signal processing method as set forth inclaim 22, wherein the inputted correlation value in each of said atleast two directions is made absolute, a predetermined value issubtracted from the absolute correlation value in each of said at leasttwo directions, and the subtracted correlation value in each of said atleast two directions is limited to a positive value.
 25. A camera signalprocessing apparatus comprising: an interpolated pixel data generatingmeans for interpolating pixel data in at least two directions based on aposition of said pixel data and/or pixel data around said position, saidpixel data being generated based on an imaging signal coming from asolid state image sensor in which an imaging light enters through acolor filter having a different spectral characteristic for each pixel,thereby separately generating interpolated pixel data in said at leasttwo directions; a correlation detecting means for detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data generated bysaid interpolated pixel data generating means; an offset means foradding a predetermined value to the correlation value detected by saidcorrelation detecting means in each of said at least two directions; aweighting means for weighting said interpolated pixel data generated bysaid interpolated pixel data generating means in each of said at leasttwo directions with the correlation value added by said offset means ineach of said at least two directions and adding together the weightedinterpolated pixel data in all of said at least two directions togenerate interpolated pixel data; and an image generating means forgenerating an image based on said interpolated pixel data weighted bysaid weighting means.
 26. The camera signal processing apparatus as setforth in claim 25, further comprising: a control means for generating anoffset value indicative of said predetermined value; wherein said offsetmeans adds said offset value generated by said control means to saidcorrelation value in each of said at least two directions.
 27. Thecamera signal processing apparatus as set forth in claim 26, whereinsaid control means generates said offset value by varying the magnitudeof said offset value according to pixel data detected by saidsolid-state image sensor.
 28. A camera signal processing methodcomprising the steps of: interpolating pixel data in at least twodirections based on a position of said pixel data and/or pixel dataaround said position, said pixel data being generated based on animaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data; adding apredetermined value to the correlation value in each of said at leasttwo directions; weighting said interpolated pixel data in each of saidat least two directions with the correlation value added with saidpredetermined value and adding together the weighted interpolated pixeldata in all of said at least two directions to generate interpolatedpixel data; and generating an image based on the weighted interpolatedpixel data.
 29. The camera signal processing method as set forth inclaim 28, wherein an offset value indicative of said predetermined valueis generated and the generated offset value is added to the saidcorrelation value in each of said at least two direction.
 30. The camerasignal processing method as set forth in claim 29, wherein said offsetvalue is generated by varying the magnitude of said offset valueaccording to said pixel data detected by said solid-state image sensor.31. A camera signal processing apparatus comprising: an interpolatedpixel data generating means for interpolating pixel data to be generatedaccording to a signal coming from a solid-state image sensor in which alight enters through a color filter having a different spectralcharacteristic for each pixel to provide interpolated pixel data basedon a position of said pixel data and/or pixel data around said position;a correlation detecting means for detecting a correlation value forindicating a degree of correlation between a horizontal direction and avertical direction of said interpolated pixel data generated by saidinterpolated pixel data generating means to weight said interpolatedpixel data; and an image generating means for generating an image basedon interpolated pixel data obtained by weighting said interpolated pixeldata generated by said interpolated pixel data generating means withsaid correlation value detected by said correlation detecting means;wherein said correlation detecting means uses only pixel data indicativeof a predetermined color in pixel data detected by said solid-stateimage sensor to detect a correlation value for interpolated pixel dataindicative of said predetermined color and a correlation value forinterpolated pixel data indicative of a color other than saidpredetermined color.
 32. The camera signal processing apparatus as setforth in claim 31, wherein said correlation detecting means uses onlypixel data having substantially a same color as that of saidinterpolated pixel data and uses a band-pass filter [−1, 0, 2, 0, −1]and a low-pass filter [1, 0, 6, 0, 1]/8 and to detect said interpolatedpixel data indicative of said predetermined color.
 33. The camera signalprocessing apparatus as set forth in claim 31, wherein said correlationdetecting means uses only pixel data of said predetermined color anduses a band-pass filter [−1, 0, 2, 0, −1]and a low-pass filter [1, 0,1]/2 to detect said correlation value for said interpolated pixel dataindicative of a color other than said predetermined color.
 34. Thecamera signal processing apparatus as set forth in claim 32, furthercomprising: a control means for controlling said correlation detectingmeans; wherein said correlation detecting means detects said correlationvalue without using said low-pass filter according to a control signalcoming from said control means.
 35. A camera signal processing methodcomprising the steps of: interpolating pixel data to be generatedaccording to a signal coming from a solid-state image sensor in which alight enters through a color filter having a different spectralcharacteristic for each pixel to provide interpolated pixel data basedon a position of said pixel data and/or pixel data around said position;detecting a correlation value for interpolated pixel data indicative ofa predetermined color and a correlation value for interpolated pixeldata indicative of a color other than said predetermined color by usingonly pixel data indicative of said predetermined color; weighting saidinterpolated pixel data with said correlation value; and generating animage based on the weighted interpolated pixel data.
 36. The camerasignal processing method as set forth in claim 35, wherein saidcorrelation value for said interpolated pixel data indicative of saidpredetermined color is detected by use of only pixel data havingsubstantially a same color as that of said interpolated pixel data andby use of a band-pass filter [−1, 0, 2, 0, −1] and a low-pass filter [1,0, 6, 0, 1]/8.
 37. The camera signal processing method as set forth inclaim 35, wherein said correlation value for said interpolated pixeldata indicative of a color other than said predetermined color isdetected by use of only said pixel data indicative of said predeterminedcolor and by use of a band-pass filter [−1, 0, 2, 0, −1] and a low-passfilter [1, 0, 1]/2.
 38. The camera signal processing method as set forthin claim 36, wherein said correlation value for said pixel dataindicative of said predetermined color is detected without using saidlow-pass filter.
 39. A camera signal processing apparatus comprising: aninterpolated pixel data generating means for interpolating pixel data inat least two directions based on a position of said pixel data and/orpixel data around said position, said pixel data being generated basedon an imaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; a correlationdetecting means for detecting a correlation value indicative of a degreeof correlation in each of said at least two directions of saidinterpolated pixel data generated by said interpolated pixel datagenerating means; an emphasis/deemphasis means for performing controlwhether said interpolated pixel data is to be generated by emphasizingthe correlation depending on said correlation value detected by saidcorrelation detecting means in each of said at least two directions; aweighting means for weighting said interpolated pixel data in each ofsaid at least two directions generated by said interpolated pixel datagenerating means with the correlation value controlled by saidemphasis/deemphasis means in each of said at least two directions andadding together the weighted interpolated pixel data in all of said atleast two directions to generate interpolated pixel data; and an imagegenerating means for generating an image based on said interpolatedpixel data weighted by said weighting means.
 40. The camera signalprocessing apparatus as set forth in claim 39, further comprising: acontrol means for controlling said emphasis/deemphasis means; whereinsaid control means outputs to said emphasis/deemphasis means a controlsignal for varying a slope of an input/output characteristic of saidcorrelation value in each of said at least two directions, therebycontrolling said emphasis/deemphasis means.
 41. The camera signalprocessing apparatus as set forth in claim 40, further comprising: asubtracting means for subtracting a predetermined value from saidcorrelation value detected by said correlation detecting means in eachof said at least two directions; and an adding means for adding saidpredetermined value to the correlation value subtracted by saidsubtracting means in each of said at least two directions; wherein saidpredetermined value is subtracted by said subtracting means from saidcorrelation value detected by said correlation detecting means in eachof said at least two directions and then a slope of an input/outputcharacteristic of said correlation value in each of said at least twodirections is varied by said emphasis/deemphasis means to add saidpredetermined value by said adding means.
 42. The camera signalprocessing apparatus as set forth in claim 40, further comprising: alimiting means for limiting a range of said correlation value in each ofsaid at least two directions; wherein said limiting means limits saidrange of said correlation value in each of said at least two directionsof which slope of the input/output characteristic has been varied bysaid emphasis/deemphasis means.
 43. The camera signal processingapparatus as set forth in claim 39, further, comprising: a normalizingmeans for generating a normalized value indicative of a relative valueof said correlation value in each of said at least two directions bynormalizing said relative value detected by said correlation detectingmeans in each of said at least two directions; wherein saidemphasis/deemphasis means varies a slope of said normalized valuegenerated by said normalizing means.
 44. A camera signal processingmethod comprising the steps of: interpolating pixel data in at least twodirections based on a position of said pixel data and/or pixel dataaround said position, said pixel data being generated based on animaging signal coming from a solid-state image sensor in which animaging light enters through a color filter having a different spectralcharacteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data; performingcontrol whether said correlation is to be emphasized depending on saidcorrelation value in each of said at least two directions; weightingsaid interpolated pixel data in each of said at least two directionswith the correlation value in each of said at least two directions ofwhich degree of correlation emphasis is controlled and adding togetherthe weighted interpolated pixel data in all of said at least twodirections to generate interpolated pixel data; and generating an imagebased on said weighted interpolated pixel data.
 45. The camera signalprocessing method as set forth in claim 44, wherein a control signal forvarying a slope of an input/output characteristic of said correlationvalue in each of said at least two directions is generated and controlis performed by said control signal whether the correlation is to beemphasized depending on said correlation value in each of said at leasttwo directions.
 46. The camera signal processing method as set forth inclaim 45, wherein: a predetermined value is subtracted from saidcorrelation value in each of said at least two directions; and saidpredetermined value is added to the subtracted correlation value in eachof said at least two directions; wherein; said predetermined value issubtracted from said correlation value in each of said at least twodirections and then a slope of an input/output characteristic of saidcorrelation value in each of said at least two directions is varied toadd said predetermined value by said adding means.
 47. The camera signalprocessing method as set forth in claim 45, wherein said slope of saidinput/output characteristic is varied by limiting a range of saidcorrelation value in each of said at least two directions.
 48. Thecamera signal processing method as set forth in claim 44, wherein saidcorrelation value in each of said at least two directions is normalizedto generate a normalized value indicative of a relative value of saidcorrelation value in each of said at least two directions and a slope ofsaid normalized value is varied.
 49. A camera signal processingapparatus comprising: an interpolated pixel data generating means forinterpolating pixel data in at least two directions based on a positionof said pixel data and/or pixel data around said position, said pixeldata being generated based on an imaging signal coming from asolid-state image sensor in which an imaging light enters through acolor filter having a different spectral characteristic for each pixel,thereby separately generating interpolated pixel data in said at leasttwo directions; a correlation detecting means for detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data generated bysaid interpolated pixel data generating means; a color-difference signaldetecting means for detecting a color-difference signal of each of saidinterpolated pixel data in each of said at least two directionsgenerated by said interpolated pixel data generating means andinterpolated pixel data added with said correlation value detected bysaid correlation detecting means in each of said at least twodirections; a selecting means for selecting a smallest one of thecolor-difference signal of said interpolated pixel data in each of saidat least two directions and the color-difference signal of theinterpolated pixel data computed by use of said correlation value ineach of said at least two directions; and an image generating means forgenerating an image based on the interpolated pixel data selected bysaid selecting means.
 50. The camera signal processing apparatus as setforth in claim 49, further comprising: a control means for controllingsaid selecting means; wherein said control means controls said selectingmeans such that the selecting means selects one of the color-differencesignal of said interpolated pixel data in each of said at least twodirections and the color-difference signal of the interpolated pixeldata computed by use of said correlation value in each of said at leasttwo directions.
 51. The camera signal processing apparatus as set forthin claim 49, wherein said selecting means selects the smallest of thecolor-difference signals having at least a predetermined value.
 52. Thecamera signal processing apparatus as set forth in claim 49, furthercomprising: an absolute value converting circuit for making absolute thecolor-difference signals of said interpolated pixel data in each of saidat least two directions and said interpolated pixel data computed by useof said correlation value in each of said at least two directions;wherein said selecting means selects a smallest color-difference signaloutputted from said absolute value converting circuit.
 53. A camerasignal processing method comprising the steps of: interpolating pixeldata in at least two directions based on a position of said pixel dataand/or pixel data around said position, said pixel data being generatedbased on an imaging signal coming from a solid-state image sensor inwhich an imaging light enters through a color filter having a differentspectral characteristic for each pixel, thereby separately generatinginterpolated pixel data in said at least two directions; detecting acorrelation value indicative of a degree of correlation in each of saidat least two directions of said interpolated pixel data; detecting acolor-difference signal of each of said interpolated pixel data in eachof said at least two directions and interpolated pixel data added withsaid correlation value in each of said at least two directions;selecting a smallest one of the color-difference signal of saidinterpolated pixel data in each of said at least two directions and thecolor-difference signal of the interpolated pixel data computed by useof said correlation value in each of said at least two directions; andgenerating an image based on the selected interpolated pixel data. 54.The camera signal processing method as set forth in claim 53, whereinone of the color-difference signal of said interpolated pixel data ineach of said at least two directions and the color-difference signal ofthe interpolated pixel data computed by use of said correlation value ineach of said at least two directions is selected.
 55. The camera signalprocessing method as set forth in claim 53, wherein the smallest one ofthe color-difference signals having at least a predetermined value isselected.
 56. The camera signal processing method as set forth in claim53, wherein color-difference signals of vertically interpolated pixeldata, horizontally interpolated pixel data, and said interpolated pixeldata computed by use of said correlation value are made absolute and thesmallest one of the absolute color-difference signals is selected.